diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts index d966fe3e23ac..c15725414d22 100644 --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts @@ -44,7 +44,6 @@ /dts-v1/; #include "sun8i-a83t.dtsi" - #include / { @@ -80,6 +79,29 @@ /* enables internal regulator and de-asserts reset */ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */ }; + +/* + reg_vcc3v0: vcc3v0 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; +*/ + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +/* + reg_vcc5v0: vcc5v0 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +*/ }; &crypto { @@ -96,11 +118,11 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&emac_rgmii_pins>; - phy-supply = <®_sw>; phy-handle = <&rgmii_phy>; phy-mode = "rgmii"; allwinner,rx-delay-ps = <700>; allwinner,tx-delay-ps = <700>; + status = "okay"; }; @@ -114,35 +136,17 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; - vmmc-supply = <®_dcdc1>; + vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ cd-inverted; status = "okay"; }; -&mmc1 { - vmmc-supply = <®_dldo1>; - vqmmc-supply = <®_dldo1>; - mmc-pwrseq = <&wifi_pwrseq>; - bus-width = <4>; - non-removable; - status = "okay"; - - brcmf: wifi@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - interrupt-parent = <&r_pio>; - interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; - interrupt-names = "host-wake"; - }; -}; - &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_emmc_pins>; - vmmc-supply = <®_dcdc1>; - vqmmc-supply = <®_dcdc1>; + vmmc-supply = <®_vcc3v3>; bus-width = <8>; non-removable; cap-mmc-hw-reset; @@ -157,10 +161,6 @@ reg = <0x3a3>; interrupt-parent = <&r_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - eldoin-supply = <®_dcdc1>; - fldoin-supply = <®_dcdc5>; - swin-supply = <®_dcdc1>; - x-powers,drive-vbus-en; }; ac100: codec@e89 { @@ -188,128 +188,11 @@ }; }; -#include "axp81x.dtsi" - -®_aldo1 { - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc-1v8"; -}; - -®_aldo2 { - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "dram-pll"; -}; - -®_aldo3 { - regulator-always-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-name = "avcc"; -}; - -®_dcdc1 { - /* schematics says 3.1V but FEX file says 3.3V */ - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-3v3"; -}; - -®_dcdc2 { - regulator-always-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1100000>; - regulator-name = "vdd-cpua"; -}; - -®_dcdc3 { - regulator-always-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1100000>; - regulator-name = "vdd-cpub"; -}; - -®_dcdc4 { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1100000>; - regulator-name = "vdd-gpu"; -}; - -®_dcdc5 { - regulator-always-on; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-name = "vcc-dram"; -}; - -®_dcdc6 { - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdd-sys"; -}; - -®_dldo1 { - /* - * This powers both the WiFi/BT module's main power, I/O supply, - * and external pull-ups on all the data lines. It should be set - * to the same voltage as the I/O supply (DCDC1 in this case) to - * avoid any leakage or mismatch. - */ - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi"; -}; - -®_dldo3 { - regulator-always-on; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; - regulator-name = "vcc-pd"; -}; - -®_drivevbus { - regulator-name = "usb0-vbus"; +®_usb1_vbus { + gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */ status = "okay"; }; -®_fldo1 { - regulator-min-microvolt = <1080000>; - regulator-max-microvolt = <1320000>; - regulator-name = "vdd12-hsic"; -}; - -®_fldo2 { - /* - * Despite the embedded CPUs core not being used in any way, - * this must remain on or the system will hang. - */ - regulator-always-on; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1100000>; - regulator-name = "vdd-cpus"; -}; - -®_rtc_ldo { - regulator-name = "vcc-rtc"; -}; - -®_sw { - /* - * The PHY requires 20ms after all voltages - * are applied until core logic is ready and - * 30ms after the reset pin is de-asserted. - * Set a 100ms delay to account for PMIC - * ramp time and board traces. - */ - regulator-enable-ramp-delay = <100000>; - regulator-name = "vcc-ephy"; -}; - &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>;