spacepaste

  1.  
  2. import time
  3. import microcontroller
  4. import digitalio
  5. DAP_TRANSFER_OK = 1 << 0
  6. DAP_TRANSFER_RnW = 1 << 1
  7. DAP_TRANSFER_WAIT = 1 << 1
  8. DAP_TRANSFER_FAULT = 1 << 2
  9. DAP_TRANSFER_ERROR = 1 << 3
  10. class SWD:
  11. def __init__(self, swdio, swclk):
  12. self.swdio = swdio
  13. self.swclk = swclk
  14. self.swclk = digitalio.DigitalInOut(swclk)
  15. self.swclk.switch_to_output()
  16. self.swclk.value = 1
  17. self.swdio = digitalio.DigitalInOut(swdio)
  18. self.swdio.switch_to_output()
  19. self.swdio.value = 1
  20. self.turnaround = 1
  21. self.idle_cycles = 0
  22. self.data_phase = 0
  23. def sw_clk_cycle(self):
  24. self.swclk.value = 0
  25. microcontroller.delay_us(1)
  26. self.swclk.value = 1
  27. microcontroller.delay_us(1)
  28. def sw_write_bit(self, bit):
  29. #self.swdio.switch_to_output()
  30. self.swdio.value = bit
  31. self.swclk.value = 0
  32. microcontroller.delay_us(1)
  33. self.swclk.value = 1
  34. microcontroller.delay_us(1)
  35. def sw_read_bit(self):
  36. self.swclk.value = 0
  37. microcontroller.delay_us(1)
  38. #self.swdio.switch_to_input()
  39. bit = self.swdio.value
  40. self.swclk.value = 1
  41. microcontroller.delay_us(1)
  42. return bit
  43. def swd_transfer(self, request, data=0):
  44. # Packet Request
  45. parity = 0
  46. self.sw_write_bit(1)
  47. bit = request >> 0
  48. self.sw_write_bit(bit)
  49. parity += bit
  50. bit = request >> 1
  51. self.sw_write_bit(bit)
  52. parity += bit
  53. bit = request >> 2
  54. self.sw_write_bit(bit)
  55. parity += bit
  56. bit = request >> 3
  57. self.sw_write_bit(bit)
  58. parity += bit
  59. self.sw_write_bit(parity)
  60. self.sw_write_bit(0)
  61. self.sw_write_bit(1)
  62. # Turnaround
  63. self.swdio.switch_to_input()
  64. for n in range(self.turnaround, 0, -1):
  65. self.sw_clk_cycle()
  66. # Ack
  67. bit = self.sw_read_bit()
  68. ack = bit << 0
  69. bit = self.sw_read_bit()
  70. ack |= bit << 1
  71. bit = self.sw_read_bit()
  72. ack |= bit << 2
  73. if (ack == DAP_TRANSFER_OK):
  74. # Data Transfer
  75. if (request & DAP_TRANSFER_RnW):
  76. # Read data
  77. val = 0
  78. parity = 0
  79. for n in range (32, 0, -1):
  80. bit = self.sw_read_bit()
  81. parity += bit
  82. val >>= 1
  83. val |= bit << 31
  84. bit = self.sw_read_bit()
  85. if ((parity ^ bit) & 1):
  86. ack = DAP_TRANSFER_ERROR
  87. data = val
  88. # Turnaround
  89. for n in range(self.turnaround, 0, -1):
  90. self.sw_clk_cycle()
  91. self.swdio.switch_to_output()
  92. else:
  93. # Turnaround
  94. for n in range(self.turnaround, 0, -1):
  95. self.sw_clk_cycle()
  96. self.swdio.switch_to_output()
  97. # Write data
  98. val = data
  99. parity = 0
  100. for n in range (32, 0, -1):
  101. self.sw_write_bit(val)
  102. parity += val
  103. val >>= 1
  104. self.sw_write_bit(parity)
  105. # Idle cycles
  106. n = self.idle_cycles
  107. if (n):
  108. self.swdio.value = 0
  109. for _ in range(n, 0, -1):
  110. self.sw_clk_cycle()
  111. self.swdio.value = 1
  112. return (ack, data)
  113. if (ack == DAP_TRANSFER_WAIT or ack == DAP_TRANSFER_FAULT):
  114. # WAIT or FAULT response
  115. if (self.data_phase and ((request & DAP_TRANSFER_RnW) != 0)):
  116. for n in range (33, 0, -1):
  117. self.sw_clk_cycle()
  118. # Turnaround
  119. for n in range(n, self.turnaround, -1):
  120. self.sw_clk_cycle()
  121. self.swdio.switch_to_output()
  122. if (self.data_phase and ((request & DAP_TRANSFER_RnW) == 0)):
  123. self.swdio.value = 0
  124. for n in range (33, 0, -1):
  125. self.sw_clk_cycle()
  126. self.swdio.value = 1
  127. return (ack, data)
  128. # Protocol error
  129. for n in range(self.turnaround + 33, 0, -1):
  130. self.sw_clk_cycle();
  131. self.swdio.switch_to_output()
  132. self.swdio.value = 1
  133. return (ack, data)
  134. if __name__ == "__main__":
  135. import board
  136. swd = SWD(board.D12, board.D11)
  137. while True:
  138. print("displaying debug port register 0")
  139. # Read debug port register
  140. SWD_REG_DP = 0
  141. SWD_REG_R = 1 << 1
  142. SWD_REG_ADR = 0 & 0x0c
  143. tmp_in = SWD_REG_DP | SWD_REG_R | SWD_REG_ADR
  144. response = swd.swd_transfer(tmp_in)
  145. ack = response[0]
  146. data = response[1]
  147. print("0x%x" %data)
  148. time.sleep(1)
  149.